Introduction of VLSI using Cadence (First step towards VLSI)

Title: Introduction of VLSI using Cadence (First step towards VLSI)

Date/Time: 15th Jan 2021 / 5:30 to 7:30

Speaker /s: 1. Mr. Shrinidhi Purohit (Desing Engineer Tessolve)
2. Pavitra B (Desing Engineer Tessolve)

Duration: 2 hr

Participant: Final Year Students ECE Dept.

Description: IEEE KLEIT organized a technical talk on introduction to VLSI using cadence to IEEE students as well non-IEEE students from ECE final Year. In the first part of the talk, one of the speakers Shrinidhi Purohit shred about the flow of VLSI Design and its importance and in the second part of the virtual session, Pavitra B  discussed VLSI digital design using cadence and its design flow for front end design in brief. Students were very much inspired, had active participation in understating cadence software uses and its importance. The last part of the session student has good QA parts for their difficulties in the domain.